The present invention relates to a semiconductor device, particularly to an art to be effectively applied to a semiconductor device comprising a nonvolatile memory device including an insulator film formed between a floating gate electrode and a control gate electrode. The present invention is especially directed to a nonvolatile memory (including, e.g., stacked type memories; or split type memories; or stacked type memories optionally having an erase gate in addition to the control and floating gates; or split type memories optionally having an erase gate in addition to the control and floating gates, with insulator films between the various gates), such as a flash memory.
A semiconductor device uses a nonvolatile memory device referred to as a flash memory. Because the flash memory is superior in portability and impact resistance and electrically allows on-board bulk erasing, it is anticipated as a file memory of a future compact portable data unit.
The flash memory is provided with a memory cell array section constituted by arranging a plurality of memory cells using a nonvolatile memory device as a memory unit like a matrix. The nonvolatile memory device is constituted on the surface of a semiconductor substrate made of, e.g., single crystalline silicon.
The above nonvolatile memory device mainly comprises a semiconductor substrate serving as a channel region, a first gate dielectric film, a floating gate electrode, a second gate dielectric film, a control gate electrode, and a pair of semiconductor regions serving as a source region and a drain region (also referred to as impurity diffusion layers). The nonvolatile memory device injects electrons into the floating gate electrode of the semiconductor substrate by applying a positive voltage to the control gate electrode of the semiconductor substrate, and stores one-bit data (xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d) in accordance with the difference in the threshold voltages of memory cell transistors. Moreover, the first gate dielectric film denotes a tunnel dielectric film formed between the semiconductor substrate and the floating gate electrode. Furthermore, the second gate dielectric film denotes, e.g., an interpoly dielectric film formed between the floating gate electrode and the control gate electrode.
In the case of the nonvolatile memory device, the floating gate electrode and the control gate electrode are each respectively formed from a polycrystalline silicon film, and the first gate dielectric film and the second gate dielectric film are respectively formed from a silicon oxide (SiO2) film. A silicon oxide film serving as the first gate dielectric film is formed by applying thermal oxidation to the surface of a semiconductor substrate made of single crystalline silicon, and a silicon oxide film serving as the second gate dielectric film is formed by applying thermal oxidation to the surface of a floating gate electrode made of a polycrystalline silicon film.
The silicon oxide film formed on the surface of the floating gate electrode made of the polycrystalline silicon film has a low breakdown voltage and is inferior in retention capability compared to a silicon oxide film formed on the surface of a semiconductor substrate made of single-crystal silicon. Therefore, in the case of flash memories of 4 [Mbit] onward, as the second gate dielectric film there is formed, in place of the single-layer silicon oxide film, a composite film, so-called an ONO (Oxide/Nitride/Oxide) film, obtained by superimposing a silicon oxide film, a silicon nitride (Si3N4) film, and a silicon oxide film in order on the floating gate electrode. This is because, when film thicknesses in terms of a silicon oxide film are the same, an ONO film has a small leakage current compared with a silicon oxide film. This art is discussed in xe2x80x9cIEEE Transaction on Electron Devices, 38(1991) pp. 386-391xe2x80x9d.
However, as the integration of a flash memory is improved, new problems occur when using an ONO film as the second gate dielectric film. One of the problems is that the process temperature following scaling of a nonvolatile memory device lowers. The ONO film is normally formed by thermally oxidizing the surface of a floating gate electrode made of a polycrystalline silicon film and thereby forming a lower silicon oxide film, then forming a silicon nitride film on the bottom silicon oxide film by a Low Pressure Chemical Vapor Deposition (LPCVD) process, and finally thermally oxidizing the surface of the silicon nitride film and thereby forming a top silicon oxide film. However, because oxidation of the silicon nitride film requires a high temperature of 900xc2x0 C. or higher, it is difficult to form a shallow junction indispensable for scaling of an LSI (Large Scale Integrated Circuit), when forming a source region and a drain region and thereafter forming the second gate dielectric film, and this is a factor for interrupting improvement in the integration of a flash memory.
According to only the thermal oxidation process described above, it is possible to form a second gate dielectric film, of a single-layer silicon oxide film, even at a low temperature of approximately 800xc2x0 C. However, this process has the problems that the thickness of a silicon oxide film decreases at the top end of the side wall of a floating gate electrode as the oxidation temperature is lowered, concentration of electric fields becomes remarkable at this portion, and leakage current increases. Moreover, an art is proposed in which a single-layer silicon oxide film is formed at a low temperature of approximately 750xc2x0 C. by the LPCVD process, instead of the thermal oxidation process, to use the film as the second gate dielectric film of a nonvolatile memory device. By using the LPCVD process, it is possible to decrease the leakage current of a silicon oxide film compared to the case of using the thermal oxidation process. However, the effect of the LPCVD process is not enough and it is practically difficult to apply the process to a nonvolatile memory device.
Another problem is to decrease the thickness of the second gate dielectric film. A voltage Vfg to be applied to a floating gate electrode for the programming/erasing operation of a nonvolatile memory device is shown by the following expression (1).
[Numerical formula 1]
Vfg=C2Vcg/(C1+C2)xe2x80x83xe2x80x83(1) 
In the above expression, Vcg denotes a voltage applied to a control gate electrode, C1 denotes the capacitance of a first gate dielectric film, and C2 denotes the capacitance of a second gate dielectric film. To efficiently supply the voltage, applied to the control gate electrode, to the floating gate electrode and lower a programming voltage, it is effective to decrease the thickness of the second gate dielectric film and increase C2. However, a conventional ONO film has a problem that electric charges accumulated in a floating gate electrode leak to a control gate electrode, that is, retention failure is actualized if thicknesses of top and bottom silicon oxide films are set to 5 nm or less. Moreover, to form the top silicon oxide film up to a thickness of 5 nm, it is necessary to form a silicon nitride film with a thickness of 10 nm or more in order to prevent the bottom polycrystalline silicon film, serving as a floating gate electrode, from oxidizing. Therefore, approximately 15 nm is a lower limit to the thickness of an ONO film in terms of a silicon oxide film. Because it is presently difficult to decrease the thickness of a first gate dielectric film, it is expected that a new second-gate-dielectric-film forming process is developed.
It is an object of the present invention to provide a semiconductor device (e.g., a nonvolatile memory device) having a gate dielectric film with a small leakage current at a low temperature, compared to a conventional ONO film, and having a stable operation and a sufficient retention capability even for smaller size (higher integration), and a method of manufacturing this semiconductor device.
It is another object of the present invention to provide a semiconductor device (e.g., a nonvolatile memory device, such as a flash memory) having two gate electrodes with an insulating film therebetween (e.g., floating and control gate electrodes, with an insulating film therebetween), wherein this insulating film has only a small leakage current, and a method of manufacturing this semiconductor device.
Moreover, it is another object of the present invention to provide an art making it possible to form a thin gate dielectric film compared to the case of using a conventional ONO film, and lower a programming voltage.
The above problems are solved by using a silicon oxide film or a composite film of a silicon oxide film and a silicon nitride film as a second gate dielectric film and introducing nitrogen into the silicon oxide film so that the maximum nitrogen atomic concentration in the silicon oxide film reaches approximately 2xc3x971020 atoms/cm3 or higher. Moreover, it is more preferable that the maximum nitrogen atomic concentration in the silicon oxide film is approximately 2xc3x971021 atoms/cm3 or less. Furthermore, by setting the maximum hydrogen atomic concentration in the silicon oxide film to 5xc3x971020 atoms/cm3 or less, better advantage is obtained.
A semiconductor device of the present invention is characterized by having a silicon oxide film between a first silicon film (e.g., first polycrystalline silicon film) and a second silicon film (e.g., second polycrystalline silicon film) above the first silicon film, introducing nitrogen into the silicon oxide film, and keeping the maximum nitrogen atomic concentration in the silicon oxide film at approximately 2xc3x971020 atoms/cm3 or higher, preferably approximately 2xc3x971021 atoms/cm3 or lower. When the semiconductor device has a nonvolatile memory device, the first silicon film can correspond to a floating gate electrode, the silicon oxide film can correspond to a second gate dielectric film, and the second silicon film can correspond to a control gate electrode. In this case, n-type impurities such as phosphorus (P) are generally introduced into the first silicon film and the second silicon film respectively. By using the silicon oxide film as the second gate dielectric film, it is possible to realize a film thickness of 15 nm or less which cannot be realized for a conventional ONO film.
The above silicon oxide film is formed, illustratively, by the LPCVD process using monosilane (SiH4) and nitrogen monoxide (N2O) as source gases. According to this process, it is possible to form a silicon oxide film at a low temperature of 700xc2x0 C. to 800xc2x0 C. As described above, however, it is difficult to use a silicon oxide film formed by the LPCVD process directly as the second gate dielectric film of a nonvolatile memory device. This is because the silicon oxide film has a large leakage current, and, when a power supply is cut off and the nonvolatile memory device is left as it is after injecting electrons into a floating gate electrode, electrons accumulated in the floating gate electrode leak to a control gate electrode and resultingly retention failure occurs. Moreover, because of a large leakage current, when injecting electrons into the floating gate electrode to boost the threshold of the nonvolatile memory device, problems also occur that the injected electrons go out to the control electrode side, the threshold voltage is not sufficiently boosted, and the writing and erasing threshold windows cannot be secured. As the result of our study, it is clarified that the leakage current of the silicon oxide film is caused by a defect referred to as an Exe2x80x2 center present in the silicon oxide film.
The Exe2x80x2 center is described in the article by Y. Kamigaki, et al., xe2x80x9cReduced Poly-Si TFT Threshold Voltage Instability By High-Temperature Hydrogenation of a-Si-Like Spin Centersxe2x80x9d, in the 33rd annual proceedings reliability physics 1995, pages 12-17, the contents of which are incorporated herein by reference in their entirety. Briefly, the Exe2x80x2 center is xe2x80xa2Sixe2x89xa1O3; and this defect can be removed by annealing in the presence of nitrogen, whereby the nitrogen is incorporated in the structure to form Nxe2x80x94Sixe2x89xa1O3, to get rid of the Exe2x80x2 center.
Therefore, in the case of the present invention, a leakage current is decreased by annealing a silicon oxide film in an NH3 environment (e.g., atmosphere) and terminating an Exe2x80x2 center at nitrogen atoms. The leakage current of the silicon oxide film is dependent on the nitrogen atomic concentration in the silicon oxide film. To decrease leakage current, control retention failure, and moreover secure a threshold voltage window, it is necessary to keep the maximum nitrogen atomic concentration in the silicon oxide film at approximately 2xc3x971020 atoms/cm3 or higher, preferably at 2xc3x971021 atoms/cm3 or lower. In this case, less nitrogen atoms are present in a middle region of the silicon oxide film than those in the top and bottom regions of the film. To obtain the above nitrogen atomic concentration, it is necessary to perform annealing in an NH3 environment (e.g., atmosphere) in a temperature range of 750xc2x0 C. to 900xc2x0 C., preferably in a temperature range of 800xc2x0 C. to 850xc2x0 C. Therefore, it is possible to lower the temperature of the gate dielectric film forming process compared to the case of a conventional ONO film. Preferably, the annealing in a nitrogen-containing environment (e.g., an ammonia atmosphere) is at a maximum temperature of 900xc2x0 C.; at such temperature in, e.g., the ammonia atmosphere, nitrogen can be incorporated in the silicon oxide film in a maximum amount of 2xc3x971021 atoms/cm3. The preferred maximum nitrogen concentration takes into account the annealing temperature.
Moreover, by keeping the maximum hydrogen atomic concentration in the silicon oxide film at 5xc3x971020 atoms/cm3 or lower, the present invention becomes more preferable. This is because hydrogen atoms present in the silicon oxide film form electron traps. When hydrogen atoms are present and a programming/erasing is performed, electrons are accumulated in a second gate dielectric film and the electrons accumulated in the gate dielectric film are discharged to a control gate electrode because of the subsequent leaving state and resultingly, retention failure occurs. To decrease the hydrogen atoms described above, it is necessary to perform wet oxidation for a short time at 800xc2x0 C. to 900xc2x0 C., preferably at 850xc2x0 C.
Moreover, the present invention becomes preferable by controlling the nitrogen atomic concentration in a silicon oxide film so that the concentration becomes lower in the top region of the silicon oxide film (adjacent the control gate electrode) than in the bottom region of the film. This nitrogen atom distribution is achieved by performing the above wet oxidation.
The present invention is not restricted to semiconductor devices having a nonvolatile memory device. For example, an advantage can be also obtained by applying the present invention to a semiconductor device having an MOS (Metal Oxide Semiconductor) transistor using one of the above first silicon film and second silicon film as an active layer and the other of them as a gate electrode, and moreover, using the above silicon oxide film as a gate dielectric film (insulator film formed between the active layer and the gate electrode). The MOS transistor includes a load MOS transistor used for a memory cell of an SRAM (Static Random Access Memory) and a switching MOS transistor used for a liquid crystal display.
Furthermore, an advantage is obtained by applying the present invention to a semiconductor device having a capacitor using the first silicon film as a bottom electrode, the second silicon film as a top electrode, and the silicon oxide film as a dielectric film.